Home Chapter 7 Multiple Choice

# Multiple Choice

This activity contains 23 questions.

## An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.

 HIGHs are applied simultaneously to both inputs S and R LOWs are applied simultaneously to both inputs S and R a LOW is applied to the S input while a HIGH is applied to the R input a HIGH is applied to the S input while a LOW is applied to the R input

## If an S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

 SET RESET clear invalid

## The symbols on this flip-flop device indicate ________.

 triggering takes place on the negative-going edge of the CLK pulse triggering takes place on the positive-going edge of the CLK pulse triggering can take place anytime during the HIGH level of the CLK waveform triggering can take place anytime during the LOW level of the CLK waveform

## With regard to a D latch, ________.

 the Q output follows the D input when EN is LOW the Q output is opposite the D input when EN is LOW the Q output follows the D input when EN is HIGH the Q output is HIGH regardless of EN's input state

## On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

 the clock pulse is LOW the clock pulse is HIGH the clock pulse transitions from LOW to HIGH the clock pulse transitions from HIGH to LOW

## A positive edge-triggered D flip-flop will store a 1 when ________.

 the D input is HIGH and the clock transitions from HIGH to LOW the D input is HIGH and the clock transitions from LOW to HIGH the D input is HIGH and the clock is LOW the D input is HIGH and the clock is HIGH

## A J-K flip-flop is in a "no change" condition when ________.

 J = 1, K = 1 J = 1, K = 0 J = 0, K = 1 J = 0, K = 0

## A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________.

 constantly LOW constantly HIGH a 20 kHz square wave a 10 kHz square wave

## Propagation delay time, tPLH, is measured from the ________.

 triggering edge of the clock pulse to the LOW-to-HIGH transition of the output triggering edge of the clock pulse to the HIGH-to-LOW transition of the output preset input to the LOW-to-HIGH transition of the output clear input to the HIGH-to-LOW transition of the output

## Four J-K flip-flops are cascaded with their J-K inputs tied HIGH. If the input frequency (fin) to the first flip-flop is 32 kHz, the output frequency (fout) is ________.

 1 kHz 2 kHz 4 kHz 16 kHz

## Two J-K flip-flops with their J-K inputs tied HIGH are cascaded to be used as counters. After four input clock pulses, the binary count is ________.

 00 11 01 10

## How many flip-flops are required to produce a divide-by-128 device?

 1 4 6 7

## The pulse width of a one-shot circuit is determined by ________.

 a resistor and capacitor two resistors two capacitors none of the above

An RC circuit used in a nonretriggerable 74121 one-shot has an REXT of 49 k and a CEXT of 0.2 F. The pulse width (tW) is approximately ________.

 6.8 s 6.8 ms 68 ms 680 ms

An RC circuit used in a 74122 retriggerable one-shot has an REXT of 100 k and a CEXT of 0.005 F. The pulse width is ________.

 70 s 16 s 160 s 32 s

The output pulse width for a 555 monostable circuit with R1 = 3.3 k and C1 = 0.02 F is ________.

 7.3 s 73 s 7.3 ms 73 ms

## A 555 operating as a monostable multivibrator has a C1 = 0.01 F. Determine R1 for a pulse width of 2 ms.

 200 k 181 k 91 k 181

## A 555 operating as a monostable multivibrator has an R1 of 220 k. Determine C1 for a pulse width of 4 ms.

 0.016 F 16 pF 160 pF 1,600 F

## In a 555 timer, three 5 k resistors provide a trigger level of ________.

 1/4 VCC and a threshold level 1/2 VCC 1/3 VCC and a threshold level 3/4 VCC 1/3 VCC and a threshold level 2/3 VCC 1/4 VCC and a threshold level 2/3 VCC

The output pulse width of a 555 monostable circuit with R1 = 4.7 k and C1 = 47 F is ________.

 24 s 24 ms 243 ms 243 s

## A 555 operating as a monostable multivibrator has a C1 = 100 F. Determine R1 for a pulse width of 500 ms.

 45 455 4.5 k 455 k

## A 555 operating as a monostable multivibrator has an R1 of 1 M. Determine C1 for a pulse width of 2 s.

 1.8 F 18 F 18 pF 18 nF

## To form the timing network that sets the output frequency of a 555 configured as an astable circuit, ________.

 three external resistors are used two external resistors and an external capacitor are used an external resistor and two external capacitors are used no external resistor or capacitor is required